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_______________general description these microprocessor (?) supervisory circuits reduce the complexity and number of components required for power-supply monitoring and battery-control functions in ? systems. they significantly improve system relia- bility and accuracy compared to separate ics or discrete components. these devices are designed for use in systems powered by 3.0v or 3.3v supplies. see the selector guide in the back of this data sheet for similar devices designed for 5v systems. the suffixes denote different reset threshold voltages: 3.075v (t), 2.925v (s), and 2.625v (r) (see reset threshold section in the detailed description ). all these parts are available in 8-pin dip and so packages. functions offered in this series are as follows: ________________________applications battery-powered computers and controllers embedded controllers intelligent instruments automotive systems critical ? power monitoring portable equipment ____________________________features ? r e s e t and reset outputs ? manual reset input ? precision supply-voltage monitor ? 200ms reset time delay ? watchdog timer (1.6sec timeout) ? battery-backup power switching battery can exceed v cc in normal operation ? 40? v cc supply current ? 1? battery supply current ? voltage monitor for power-fail or low-battery warning ? guaranteed r e s e t ? assertion to v cc = 1v ? 8-pin dip and so packages ______________ordering information ordering information continued on last page. * contact factory for dice specifications. ** these parts offer a choice of reset threshold voltage. select the letter corresponding to the desired nominal reset threshold voltage (t = 3.075v, s = 2.925v, r = 2.625v) and insert it into the blank to complete the part number. max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits ________________________________________________________________ maxim integrated products 1 max690t/s/r max802t/s/r MAX804t/s/r max805t/s/r 0.1 m f v out reset (reset) pfo wdi r1 vbatt v cc gnd gnd gnd v cc 0.1 m f 0.1 m f 3.6v lithium battery cmos ram m p v cc reset nmi i/o line unregulated dc regulated +3.3v or +3.0v r2 bus ( ) are for MAX804t/s/r, max805t/s/r pfi see last page for max704t/s/r, max806t/s/r. __________________pin configuration 1 2 3 4 8 7 6 5 dip/so top view pfo vbatt reset (reset) wdi < mr > v out v cc gnd pfi max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r ( ) are for MAX804t/s/r, max805t/s/r < > are for max704t/s/r, max806t/s/r _________typical operating circuits call toll free 1-800-998-8800 for free samples or literature. 19-0243; rev 1; 9/94 part** temp. range max690 _cpa 0? to +70? max690_csa 0? to +70? max690_c/d 0? to +70? dice* 8 so 8 plastic dip pin-package part max690_epa -40? to +85? max690_esa -40? to +85? max690_mja -55? to +125? 8 cerdip 8 so 8 plastic dip active-low reset active-high reset watchdog input manual reset input backup-battery switch power-fail threshold accuracy power-fail comparator reset window max690 33 3 ?% 3 ?5mv max704 333 ?% 3 ?5mv max802 33 3 ?% 3 ?% MAX804 33 3 ?% 3 ?% max805 33 3 ?% 3 ?5mv max806 333 ?% 3 ?%
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = 3.17v to 5.5v for the max690t/max704t/max80_t, v cc = 3.02v to 5.5v for the max690s/max704s/max80_s, v cc = 2.72v to 5.5v for the max690r/max704r/max80_r; vbatt = 3.6v; t a = t min to t max ; unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. terminal voltage (with respect to gnd) v cc .........................................................................-0.3v to 6.0v vbatt ....................................................................-0.3v to 6.0v all other inputs ...................-0.3v to the higher of v cc or vbatt continuous input current v cc ..................................................................................100ma vbatt ...............................................................................18ma gnd ..................................................................................18ma output current r e s e t , p f o ....................................................................18ma v out ................................................................................100ma continuous power dissipation (t a = +70?) plastic dip (derate 9.09mw/? above +70?) ..............727mw so (derate 5.88mw/? above +70?) ...........................471mw cerdip (derate 8.00mw/? above +70?) ...................640mw operating temperature ranges max690_c_ _/max704_c_ _/max80_ _c_ _ ........0? to +70? max690_e_ _/max704_e_ _/max80_ _e_ _. .....-40? to +85? max690_m_ _/max704_m_ _/max80_ _m_ _... -55? to +125? storage temperature range .............................-65? to +160? lead temperature (soldering, 10sec) .............................+300? max690_m, max704_m, max80_ _m, v cc < 5.5v v cc = 2.0v, vbatt = 2.3v v cc -v cc - 0.0015 0.0006 v out output voltage v v cc -v cc - 0.35 0.15 v cc -v cc - 0.035 0.015 v cc -v cc - 0.3 0.15 v cc -v cc - 0.03 0.015 40 50 v 1.1 5.5 1.0 5.5 operating voltage range, v cc , vbatt (note 1) ? 0.01 5 battery leakage current (note 3) 0.01 0.5 ? 0.4 10 vbatt supply current, any mode (excluding i out ) (note 2) 0.4 1 50 65 40 55 ? 50 70 i supply v cc supply current (excluding i out ) ? 25 50 v cc supply current in battery- backup mode (excluding i out ) units min typ max symbol parameter max690_c/e, max704_c/e, max80_ _c/e, i out = 5ma (note 4) max690_e/m, max704_e/m, max80_ _e/m max690_m, max704_m, max80_ _m max690_m, max704_m, max80_ _m m r ? = v cc (max704_/ max806_) m r ? = v cc (max704_/ max806_) conditions max690_c, max704_c, max80_ _c max690_c/e, max704_c/e, max80_ _c/e max690_c/e, max704_c/e, max80_ _c/e i out = 250?, v cc > 2.5v (note 4) max690_m, max704_m, max80_ _m i out = 50ma max690_m, max704_m, max80_ _m i out = 5ma (note 4) max690_c/e, max704_c/e, max80_ _c/e i out = 50ma max690_c/e, max704_c/e, max80_ _c/e, v cc < 3.6v max690_c/e, max704_c/e, max80_ _c/e, v cc < 5.5v max690_m, max704_m, max80_ _m, v cc < 3.6v
v max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = 3.17v to 5.5v for the max690t/max704t/max80_t, v cc = 3.02v to 5.5v for the max690s/max704s/max80_s, v cc = 2.72v to 5.5v for the max690r/max704r/max80_r; vbatt = 3.6v; t a = t min to t max ; unless otherwise noted. typical values are at t a = +25?c.) ? -10 10 reset output leakage current (note 9) -1 1 0.17 0.3 v ol p f o , r e s e t output voltage 0.13 0.3 v 0.06 0.3 v ol p f o , r e s e t , reset output voltage mv 65 25 v vbatt - 0.14 vbatt vbatt - 0.1 - 0.034 v out in battery-backup mode ? 180 500 i os p f o , r e s e t output short to gnd current (note 4) v v cc v cc - 0.3 - 0.05 v oh p f o , r e s e t output voltage ms 140 200 280 t wp reset timeout period 3.00 3.085 3.14 v 2.30 2.40 2.50 v sw battery switch threshold, v cc falling 3.00 3.075 3.15 3.00 3.085 3.17 3.00 3.075 3.12 units min typ max symbol parameter v 2.59 2.635 2.72 v rst reset threshold (note 8) 2.55 2.625 2.70 2.55 2.635 2.72 2.59 2.625 2.70 2.88 2.935 3.02 2.85 2.925 3.00 2.85 2.935 3.02 2.88 2.925 3.00 v battery switch threshold, v cc rising (note 7) v cc rising v cc falling v cc rising v cc falling v cc rising v cc falling v cc rising v cc falling v cc rising v cc falling v cc rising v cc falling vbatt = 0v, v cc = 1.2v, i sink = 200?, max690_e/m, max704_e/m, max80_ _e/m i sink = 1.2ma; max690_/704_/802_/806_, v cc = v rst min; MAX804_/805_, v cc = v rst max vbatt - v cc , v sw > v cc > 1.75v (note 5) i out = 250?, vbatt = 2.3v v cc = 3.3v, v oh = 0v i source = 50? v cc < 3.6v vbatt > v cc (note 6) max690s/704s/805s conditions this value is identical to the reset threshold, v cc rising vbatt = 0v, v cc = v rst min; v reset = 0v, v cc vbatt = 0v, v cc = 1.0v, i sink = 40?, max690_c, max704_c, max80_ _c max802r/804r/806s max690t/704t/805t max802t/804t/806t max690r/704r/805r max802s/804s/806s i out = 1ma, vbatt = 2.3v MAX804_e/m, max805_e/m MAX804_c, max805_c
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits 4 _______________________________________________________________________________________ na -500 2 500 pfi input current -25 2 25 min typ max ns 100 20 t mr m r pulse width v 0.3 x v cc v ih m r input threshold 0.7 x v cc ns 60 500 t md m r to reset delay ? 20 60 350 m r pull-up current v 0.7 x v cc v ih 0.3 x v cc v il wdi input threshold 1.12 1.60 2.24 ns 100 20 wdi pulse width v il max690_m, max802_m, MAX804_m, max805_m -1 0.01 1 -10 0.01 10 ? wdi input current max690/max802/MAX804/ max805 only sec t wd watchdog timeout period note 1: v cc supply current, logic input leakage, watchdog functionality (max690_/802_/805_/804_), m r functionality (max704_/806_), pfi functionality, state of r e s e t (max690_/704_/802_/806_), and reset (MAX804_/805_) tested at vbatt = 3.6v, and v cc = 5.5v. the state of r e s e t or reset and p f o is tested at v cc = v cc min. note 2: tested at vbatt = 3.6v, v cc = 3.5v and 0v. the battery current will rise to 10? over a narrow transition window around v cc = 1.9v. note 3: leakage current into the battery is tested under the worst-case conditions at v cc = 5.5v, vbatt = 1.8v and at v cc = 1.5v, vbatt= 1.0v. note 4: guaranteed by design. note 5: when v sw > v cc > vbatt, v out remains connected to v cc until v cc drops below vbatt. the v cc -to-vbatt comparator has a small 25mv typical hysteresis to prevent oscillation. for v cc < 1.75v (typ), v out switches to vbatt regardless of the voltage on vbatt. note 6: when vbatt > v cc > v sw , v out remains connected to v cc until v cc drops below the battery switch threshold (v sw ). note 7: v out switches from vbatt to v cc when v cc rises above the reset threshold, independent of vbatt. switchover back to v cc occurs at the exact voltage that causes r e s e t to go high (on the MAX804_/805_, reset goes low); however switchover occurs 200ms prior to reset. note 8: the reset threshold tolerance is wider for v cc rising than for v cc falling to accommodate the 10mv typical hysteresis, which prevents internal oscillation. note 9: the leakage current into or out of the reset pin is tested with reset asserted (reset output high impedance). max690_/max704_/max805_ v 1.187 1.237 1.287 v pft pfi input threshold 1.212 1.237 1.262 symbol parameter units max704_/max806_ only max704_/max806_ only max704_/max806_ only, m r = 0v, v cc = 3v 0v< v cc < 5.5v max704_/max806_ only max690_m, max704_m, max80_ _m v cc < 3.6v v pfi falling conditions max690_/max802_/MAX804_/max805_ only v cc < 3.6v max690_c/e, max704_c/e, max80_ _c/e max802_c/e, MAX804_c/e, max806_c/e max690_c/e, max802_c/e, MAX804_c/e, max805_c/e max690_/max802_/MAX804_/max805_ only max690_m, max704_m, max80_ _m mv 10 25 na -500 2 500 pfi input current -25 2 25 v pfh pfi hysteresis, pfi rising 10 20 max690_m, max704_m, max80_ _m v cc < 3.6v max690_c/e, max704_c/e, max80_ _c/e max690_c/e, max704_c/e, max80_ _c/e electrical characteristics (continued) (v cc = 3.17v to 5.5v for the max690t/max704t/max80_t, v cc = 3.02v to 5.5v for the max690s/max704s/max80_s, v cc = 2.72v to 5.5v for the max690r/max704r/max80_r; vbatt = 3.6v; t a = t min to t max ; unless otherwise noted. typical values are at t a = +25?c.)
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits _______________________________________________________________________________________ 5 5 0 ?0 ?0 60 140 v cc -to-v out on-resistance vs. temperature 1 4 max690-806 toc01 temperature (?) v cc -to-v out on-resistance ( w ) 20 100 ?0 0 80 40 120 3 2 v cc = 5v v cc = 3.3v v cc = 2.5v vbatt = 3.0v 180 20 ?0 ?0 60 140 vbatt-to-v out on-resistance vs. temperature 60 max690-806 toc02 temperature (?) vbatt-to-v out on-resistance ( w ) 20 100 ?0 0 80 40 120 140 100 v cc = 0v vbatt = 3.3v vbatt = 3v vbatt = 2v vbatt = 5v 50 25 ?0 ?0 60 140 supply current vs. temperature 30 45 max690-806 toc03 temperature (?) supply current ( m a) 20 100 ?0 0 80 40 120 40 35 v cc = 5v v cc = 3.3v v cc = 2.5v vbatt = 3v pfi = gnd mr/wdi floating 10,000 0.1 ?0 ?0 60 140 battery supply current vs. temperature 1 1000 max690-806 toc04 temperature (?) battery supply current (na) 20 100 ?0 0 80 40 120 100 10 vbatt = 3v vbatt = 5v vbatt = 2v v cc = 0v pfi = gnd 1.240 1.230 ?0 ?0 60 140 pfi threshold vs. temperature 1.232 1.238 max690-806 toc07 temperature (?) pfi threshold (v) 20 100 ?0 0 80 40 120 1.236 1.234 v cc = 5v v cc = 3.3v v cc = 2.5v vbatt = 3.0v 216 196 ?0 ?0 60 140 reset timeout period vs. temperature 200 212 max690-806 toc05 temperature (?) reset timeout period (ms) 20 100 ?0 0 80 40 120 208 204 v cc = 5v v cc = 3.3v vbatt = 3.0v 30 10 ?0 ?0 60 140 reset-comparator propagation delay vs. temperature 14 26 max690-806 toc06 temperature (?) propagation delay ( m s) 20 100 ?0 0 80 40 120 22 18 vbatt = 3.0v 100mv overdrive 1.004 0.994 ?0 ?0 60 140 normalized reset threshold vs. temperature 0.996 1.002 max690-806 toc08 temperature (?) normalized reset threshold (v) 20 100 ?0 0 80 40 120 1.000 0.998 vbatt = 3.0v __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.)
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r _______________detailed description reset output a microprocessor? (p?) reset input starts the ? in a known state. these ? supervisory circuits assert reset to prevent code execution errors during power-up, power- down, brownout conditions, or a watchdog timeout. r e s e t ? is guaranteed to be a logic low for 0v < v cc < v rst , provided that vbatt is greater than 1v. without a backup battery, r e s e t ? is guaranteed valid for v cc > 1v. once v cc exceeds the reset threshold, an internal timer keeps r e s e t ? low for the reset timeout period; after this interval, r e s e t ? goes high (figure 2). if a brownout condition occurs (v cc dips below the reset threshold), r e s e t ? goes low. each time r e s e t is asserted, it stays low for the reset timeout period. any time v cc goes below the reset threshold, the internal timer restarts. the watchdog timer can also initiate a reset. see the watchdog input section. the MAX804_/max805_ active-high reset output is open drain, and the inverse of the max690_/max704_/ max802_/max806_ r e s e t ? output. reset threshold the max690t/max704t/max805t are intended for 3.3v systems with a ?% power-supply tolerance and a 10% system tolerance. except for watchdog faults, reset will not assert as long as the power supply remains above 3.15v (3.3v - 5%). reset is guaranteed to assert before the power supply falls below 3.0v. the max690s/max704s/max805s are designed for 3.3v ?0% power supplies. except for watchdog faults, they are guaranteed not to assert reset as long as the supply remains above 3.0v (3.3v - 10%). reset is guaranteed to assert before the power supply falls below 2.85v (v cc - 14%). the max690r/max704r/max805r are optimized for monitoring 3.0v ?0% power supplies. reset will not occur until v cc falls below 2.7v (3.0v - 10%), but is guaranteed to occur before the supply falls below 2.59v (3.0v - 14%). the max802r/s/t, MAX804r/s/t, and max806r/s/t are respectively similar to the max690r/s/t, max805r/s/t, and max704r/s/t, but with tightened reset and power-fail threshold tolerances. 3.0v/3.3v microprocessor supervisory circuits 6 _______________________________________________________________________________________ ______________________________________________________________pin description 1 v out supply output for cmos ram. when v cc is above the reset threshold, v out is connected to v cc through a p-channel mosfet switch. when v cc falls below v sw and vbatt, vbatt connects to v out . connect to v cc if no battery is used. 2 v cc main supply input 3 gnd ground 4 pfi power-fail input. when pfi is less than v pft or when v cc falls below v sw , p f o goes low; otherwise, p f o remains high. connect to ground if unused. 7 r e s e t active-low reset output. pulses low for 200ms when triggered, and stays low whenever v cc is below the reset threshold or when m r is a logic low. it remains low for 200ms after either v cc rises above the reset threshold, the watchdog triggers a reset, or m r goes from low to high. m r manual reset input. a logic low on m r asserts reset. reset remains asserted as long as m r is low and for 200ms after m r returns high. this active-low input has an internal 70? pull-up current. it can be driven from a ttl or cmos logic line, or shorted to ground with a switch. leave open if unused. 6 wdi watchdog input. if wdi remains high or low for 1.6sec, the internal watchdog timer runs out and reset is triggered. the internal watchdog timer clears while reset is asserted or when wdi sees a rising or falling edge. the watchdog function cannot be disabled. 5 p f o power-fail output. when pfi is less than v pft , or v cc falls below v sw , p f o goes low; otherwise, p f o remains high. leave open if unused. 8 vbatt backup-battery input. when v cc falls below v sw and vbatt, v out switches from v cc to vbatt. when v cc rises above the reset threshold, v out reconnects to v cc . vbatt may exceed v cc . connect to v cc if no battery is used. reset active-high, open-drain reset output is the inverse of r e s e t . name function max690 max802 1 2 pin 3 4 6 5 8 7 MAX804 max805 1 2 3 4 7 6 5 8 max704 max806
watchdog input (max690_/802_/804_/805_) the watchdog circuit monitors the ?? activity. if the ? does not toggle the watchdog input (wdi) within 1.6sec, a reset pulse is triggered. the internal 1.6sec timer is cleared by either a reset pulse or by a transition (low-to- high or high-to-low) at wdi. if wdi is tied high or low, a r e s e t ? pulse is triggered every 1.8sec (t wd plus t rs ). as long as reset is asserted, the timer remains cleared and does not count. as soon as reset is deasserted, the timer starts counting. unlike the 5v max690 family, the watchdog function cannot be disabled. power-fail comparator the pfi input is compared to an internal reference. if pfi is less than v pft , p f o ? goes low. the power-fail comparator is intended for use as an undervoltage detector to signal a failing power supply. however, the comparator does not need to be dedicated to this function because it is completely separate from the rest of the circuitry. the power-fail comparator turns off and p f o ? goes low when v cc falls below v sw on power-down. the power- fail comparator turns on as v cc crosses v sw on power-up. if the comparator is not used, connect pfi to ground and leave p f o ? unconnected. p f o may be connected to m r on the max704_/max806_ so that a low voltage on pfi will generate a reset (figure 5b). max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits _______________________________________________________________________________________ 7 v batt reset (reset) wdi v cc mr battery switchover comparator reset comparator reset generator watchdog timer battery switchover circuitry max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r pfo v out pfi v pft 1.237v 1.237v ** * * power-fail comparator * max690t/s/r, max802t/s/r, MAX804t/s/r, max805t/s/r only ** max704t/s/r, max806t/s/r only ( ) MAX804t/s/r, max805t/s/r only v batt = 3.6v 3.0v or 3.3v v sw t wp reset pfo v cc ( ) MAX804t/s/r, max805t/s/r only, reset externally pulled up to v cc v out v sw (reset) 3.0v or 3.3v 3.0v or 3.3v 0v v rst v batt = pfi = 3.6v i out = 0ma figure 1. block diagram figure 2. timing diagram
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r backup-battery switchover in the event of a brownout or power failure, it may be necessary to preserve the contents of ram. with a backup battery installed at vbatt, the devices auto- matically switch ram to backup power when v cc falls. this family of ? supervisors (designed for 3.3v and 3v systems) doesn? always connect vbatt to v out when vbatt is greater than v cc . vbatt connects to v out (through a 140 switch) when v cc is below v sw and vbatt is greater than v cc , or when v cc falls below 1.75v (typ) regardless of the vbatt voltage. this is done to allow the backup battery (e.g., a 3.6v lithium cell) to have a higher voltage than v cc . switchover at v sw (2.40v) ensures that battery-backup mode is entered before v out gets too close to the 2.0v minimum required to reliably retain data in cmos ram. switchover at higher v cc voltages would decrease backup-battery life. when v cc recovers, switchover is deferred until v cc rises above the reset threshold (v rst ) to ensure a stable supply. v out is connected to v cc through a 3 pmos power switch. manual reset a logic low on m r asserts reset. reset remains asserted while m r is low, and for t wp (200ms) after m r returns high. this input has an internal 70? pull-up current, so it can be left open if it is not used. m r can be driven with ttl or cmos logic levels, or with open-drain/collector outputs. connect a normally open momentary switch from m r to gnd to create a manual-reset function; external debounce circuitry is not required. __________applications information these ? supervisory circuits are not short-circuit protected. shorting v out to ground?xcluding power- up transients such as charging a decoupling capacitor?estroys the device. decouple both v cc and vbatt pins to ground by placing 0.1? capacitors as close to the device as possible. using a supercap as a backup power source supercaps are capacitors with extremely high capacitance values (e.g., order of 0.47f) for their size. figure 3 shows two ways to use a supercap as a backup power source. the supercap may be connected through a diode to the 3v input (figure 3a) or, if a 5v supply is also available, the supercap may be charged up to the 5v supply (figure 3b) allowing a longer backup period. since vbatt can exceed v cc while v cc is above the reset threshold, there are no special precautions when using these ? supervisors with a supercap. operation without a backup power source these ? supervisors were designed for battery- backed applications. if a backup battery is not used, connect both vbatt and v out to v cc , or use a different ? supervisor such as the max706t/s/r or max708t/s/r. replacing the backup battery the backup power source can be removed while v cc remains valid, if vbatt is decoupled with a 0.1? capacitor to ground, without danger of triggering reset/ r e s e t . as long as v cc stays above v sw , battery-backup mode cannot be entered. adding hysteresis to the power-fail comparator the power-fail comparator has a typical input hysteresis of 10mv. this is sufficient for most applica- tions where a power-supply line is being monitored through an external voltage divider (see the section monitoring an additional power supply ). if additional noise margin is desired, connect a resistor between p f o ? and pfi as shown in figure 4a. select the ratio of r1 and r2 such that pfi sees 1.237v (v pft ) when v in falls to its trip point (v trip ). r3 adds the hysteresis and will typically be more than 10 times the value of r1 or r2. the hysteresis window extends both above (v h ) and below (v l ) the original trip point (v trip ). 3.0v/3.3v microprocessor supervisory circuits 8 _______________________________________________________________________________________ supercap is a trademark of baknor industries. pin name status v out connected to vbatt through an internal 140 switch v cc disconnected from v out pfi the power-fail comparator is disabled when v cc < v sw p f o logic low when v cc < v sw or pfi < v pft wdi the watchdog timer is disabled m r disabled r e s e t low logic reset high impedance vbatt connected to v out table 1. input and output status in battery-backup mode
connecting an ordinary signal diode in series with r3, as shown in figure 4b, causes the lower trip point (v l ) to coincide with the trip point without hysteresis (v trip ), so the entire hysteresis window occurs above v trip . this method provides additional noise margin without compromising the accuracy of the power-fail threshold when the monitored voltage is falling. it is useful for accurately detecting when a voltage falls past a threshold. the current through r1 and r2 should be at least 1a to ensure that the 25na (max over extended temperature range) pfi input current does not shift the trip point. r3 should be larger than 10k so it does not load down the p f o ? pin. capacitor c1 adds additional noise rejection. monitoring an additional power supply these ? supervisors can monitor either positive or negative supplies using a resistor voltage divider to pfi. p f o ? can be used to generate an interrupt to the ? (figure 5). connecting p f o ? to m r on the max704 and max806 causes reset to assert when the monitored supply goes out of tolerance. reset remains asserted as long as p f o ? holds m r low, and for 200ms after p f o ? goes high. interfacing to ?s with bidirectional reset pins ?s with bidirectional reset pins, such as the motorola 68hc11 series, can contend with the max690_/ max704_/max802_/max806_ r e s e t ? output. if, for example, the r e s e t ? output is driven high and the ? wants to pull it low, indeterminate logic levels may result. to correct this, connect a 4.7k resistor between the r e s e t ? output and the ? reset i/o, as in figure 6. buffer the r e s e t ? output to other system components. negative-going v cc transients while issuing resets to the ? during power-up, power- down, and brownout conditions, these supervisors are relatively immune to short-duration negative-going v cc transients (glitches). it is usually undesirable to reset the ? when v cc experiences only small glitches. figure 7 shows maximum transient duration vs. reset- comparator overdrive, for which reset pulses are not generated. the graph was produced using negative- going v cc pulses, starting at 3.3v and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). the graph shows the maximum pulse width a negative-going v cc transient may typically have without causing a reset pulse to be issued. as the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. typically, a v cc transient that goes 100mv below the reset threshold and lasts for 40? or less will not cause a reset pulse to be issued. a 100nf bypass capacitor mounted close to the v cc pin provides additional transient immunity. max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits _______________________________________________________________________________________ 9 max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r v out to static ram vbatt v cc gnd 1n4148 reset (reset) ( ) are for MAX804t/s/r, max805t/s/r only to m p 0.47f 3.0v or 3.3v max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r v out to static ram vbatt v cc gnd 1n4148 reset (reset) ( ) are for MAX804t/s/r, max805t/s/r only to m p 0.47f 3.0v or 3.3v +5v b a figure 3. using a supercap as a backup power source
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits 10 ______________________________________________________________________________________ max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r v cc gnd 0v to m p v l = r 1 v pft pfi pfo r 1 r 2 r 3 *optional c1* v in v trip v in pfo 0v v h v l r 1 + r 2 r 2 v h = (v pft + v pfh ) (r 1 ) v trip = v pft + r 1 1 + r 2 1 r 3 1 r 3 v cc v pft = 1.237v v pfh = 10mv where v cc gnd to m p pfi pfo r 1 r 2 r 3 *optional c1* v in r 1 + r 2 r 2 v h = r 1 (v pft + v pfh ) v trip = v pft + r 1 1 + r 2 1 r 3 1 r 3 (v cc - v d ) v pft = 1.237v v pfh = 10mv v d = diode forward voltage drop v l = v trip where max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r 0v pfo 0v v h v in v trip b a ( ) ( ) ( ) ( ) + r 1 1 + r 2 1 r 3 1 ( ) max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r v cc gnd pfi pfo r 1 r 2 v- 0v v- pfo v trip v l v pft = 1.237v v pfh = 10mv where 3.0v or 3.3v v trip = r 2 + r 1 1 ) ( r 2 1 r 1 v cc (v pft + v pfh ) v l = r 2 + r 1 1 ) ( r 2 1 r 1 v cc (v pft ) note: v trip is negative v cc max690t/s/r max704t/s/r max802t/s/r MAX804t/s/r max805t/s/r max806t/s/r v cc gnd pfi pfo r 1 r 2 pfo v trip v h * max704t/s/r, max806t/s/r only 3.0v or 3.3v v in v trip = ) ( r 2 r 1 + r 2 v pft v h = (v pft + v pfh ) v cc v in mr * b a ) ( r 2 r 1 + r 2 figure 4. a) adding additional hysteresis to the power-fail comparator b) shifting the additional hysteresis above v pft figure 5. using the power-fail comparator to monitor an additional power supply
max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits ______________________________________________________________________________________ 11 max690t/s/r max704t/s/r max802t/s/r max806t/s/r v cc gnd reset v cc gnd 4.7k reset m p buffered reset to other system components 100 0 10 100 1000 20 ds690-806 fig7 reset comparator overdrive (v rst - v cc ) (mv) maximum transient duration ( m s) 40 60 80 v cc = 3.3v t a = +25? figure 6. interfacing to ?s with bidirectional reset i/o figure 7. maximum transient duration without causing a reset pulse vs. reset comparator overdrive max704t/s/r max806t/s/r v out reset vbatt v cc gnd 0.1? 3.6v pfi mr 0.1? 0.1? ram m p 3.0v or 3.3v _typical operating circuits (cont.)
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1994 maxim integrated products printed usa is a registered trademark of maxim integrated products. max690t/s/r, 704t/s/r, 802t/s/r, 804?06t/s/r 3.0v/3.3v microprocessor supervisory circuits _ordering information (continued) ___________________chip topography part** temp. range max704 _cpa 0? to +70? max704_csa 0? to +70? max704_c/d 0? to +70? dice* 8 so 8 plastic dip pin-package max704_epa -40? to +85? max704_esa -40? to +85? max704_mja -55? to +125? 8 cerdip 8 so 8 plastic dip max802 _cpa 0? to +70? max802_csa 0? to +70? max802_c/d 0? to +70? dice* 8 so 8 plastic dip max802_epa -40? to +85? max802_esa -40? to +85? max802_mja -55? to +125? 8 cerdip 8 so 8 plastic dip MAX804 _cpa 0? to +70? MAX804_csa 0? to +70? MAX804_c/d 0? to +70? dice* 8 so 8 plastic dip MAX804_epa -40? to +85? MAX804_esa -40? to +85? MAX804_mja -55? to +125? 8 cerdip 8 so 8 plastic dip max805 _cpa 0? to +70? max805_csa 0? to +70? max805_c/d 0? to +70? dice* 8 so 8 plastic dip max805_epa -40? to +85? max805_esa -40? to +85? max805_mja -55? to +125? 8 cerdip 8 so 8 plastic dip max806 _cpa 0? to +70? max806_csa 0? to +70? max806_c/d 0? to +70? dice* 8 so 8 plastic dip max806_epa -40? to +85? max806_esa -40? to +85? max806_mja -55? to +125? 8 cerdip 8 so 8 plastic dip * contact factory for dice specifications. ** these parts offer a choice of reset threshold voltage. select the letter corresponding to the desired nominal reset threshold voltage (t = 3.075v, s = 2.925v, r = 2.625v) and insert it into the blank to complete the part number. wdi [mr] reset (reset) gnd v cc vbatt v out pfi pfo 0.110" (2.794mm) 0.080" (2.032mm) ( ) are for MAX804t/s/r, max805t/s/r. [ ] are for max704t/s/r, max806t/s/r. transistor count: 802; substrate is connected to the higher of v cc or vbatt, and must be floated in any hybrid design.

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